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Article archive for Xilinx Ltd;
As September 2019 begins, we've reviewed the most popular stories – as determined by our readers – across EPDT’s website & newsletter during the last month...
New Virtex UltraScale+ device enables the creation of tomorrow’s most complex ASIC & SoC technologies, as well as the development of algorithms for AI, machine learning & sensor fusion.
Xilinx and Samsung collaborate to deliver advanced 5G solutions using forthcoming Versal ACAP.
Xilinx technology is enabling the next-generation of intelligent edge application development from Baidu.
Xilinx launched an Embedded Vision Developer Zone to help build All Programmable, differentiated Embedded Vision applications.
Xilinx announced that Baidu is utilising Xilinx FPGAs to accelerate machine learning applications in their data centres in China.
Xilinx announced the 2016.1 release of the SDSoC development environment, enabling software defined programming for the Zynq family of SoCs.
The unmanned aerial vehicle (UAV) and drone industry is quickly growing and reaching new commercial and consumer markets.
The electronics industry is heavily invested in the development of new memory technologies such as PRAM, MRAM and RRAM.
The three major trends in the automotive industry—electrification, connectivity and autonomy—have one thing in common: software.
The goals for the 5G Radio Access Network (RAN) are lofty indeed and have been discussed at length by industry experts. What has received far less airtime is, “What exactly is the best path to 5G?”
Xilinx launched its next generation of Video over IP connectivity solutions to address the industry’s transition to all IP-based networks.
Xilinx announced the SDSoC Development Environment for all programmable SoCs and MPSoCs.
Xilinx claims that it has delivered the industry’s first 4M logic cell device, offering >50M equivalent ASIC gates and 4X more capacity.
Modern FPGA chips are capable of developing high-performance applications, but power management in these designs is usually a limiting factor.
Modern FPGA-based designs use an increasing amount of intellectual property (IP), both in variety and number of instances.
DDR4 is the last of the popular DDR line of memories that the majority of Xilinx customers use. Multiple contenders are vying for a chunk of that market share, leading Tamara I Schmitz, Xilinx, to speculate on its successor.
Xilinx and Pico Computing announce a 15Gbit/s Hybrid Memory Cube (HMC) interface for All Programmable UltraScale device.
Visitors are invited to emonstrations of the Zynq-7000 All Programmable SoCs, smart IP and Vivado high level design abstractions.
It is based on the UltraScale architecture, and is, says the company, the industry’s only high-end 20nm.