Article archive for Lattice Semiconductor;
As November 2019 begins, we've reviewed the most popular stories – as determined by our readers – across EPDT’s website & newsletter during the last month...
New CrossLinkPlus family from Lattice combines FPGA flexibility with instant-on panel display performance, accelerating embedded vision system designs in industrial, automotive, computing & consumer applications.
Lattice's new FPGA family simplifies implementation of comprehensive, flexible & robust hardware security throughout the entire product lifecycle, enhancing security for computing, communications, industrial control & automotive systems.
Lattice Semiconductor Corporation have expanded the company’s popular AI integration solutions, known collectively as the Lattice sensAI stack, designed to further speed developers' time-to-market for flexible consumer and IIoT machine learning.
Lattice Semiconductor announced the Lattice CrossLink programmable bridging device that supports leading protocols for mobile image sensors and displays.
Lattice Semiconductor and MediaTek announced the joint release of power-efficient reference designs that drive 4K UHD over a USB Type-C connector.
The ECP5 family of FPGAs break the conventional cost, power and functional density rules, claims Lattice Semiconductor.
Lattice Semiconductor announced its ultra-low density MachXO3 FPGA family, a small, low-cost-per I/O programmable platform.
Lattice announced a SensorExtender reference design that offers a low-cost approach to remotely locate image sensors
Distributor Digi-Key has announced the addition of Lattice’s MachXO2 PLDs.
Lattice Semiconductor is exhibiting at the Embedded System Conference held in Nuremberg.
Lattice Semiconductor has unveiled its new MachXO2 PLD family.
Lattice has partnered with Affarii to produce a low power RRH solution at 1300mW per antenna.
Lattice Semiconductor has extended its distribution agreement with MSC Vertriebs GmbH to include Benelux and Italy.
Designers of digital systems face new challenges as high speed serial interfaces, using Serialised/Deserialiser (SERDES) technology, replace the more traditional parallel bus architectures. One odf these challenges is with the clocking device. Srirama Chandra discusses a new option.
New feature expands MOSFET options for hot swap designs.
Image acquisition is the most critical component of security and surveillance video chains, since the ability of image signal processing to extract useful information out of the video stream is only as good as the quality of image capture – in reality the combination of sensor quality and the quality of sensor output processing.
Lattice Semi and Affarii have developed a 3G/4G-based Remote Radio Head (RRH) solution.
Eight new reference designs and two development kits target low power, space constrained applications.
Ted Merena examines the options available for securing and protecting FPGA design code and an entire design.