Avoiding electro-chemical failure

07 December 2006

SIR testing has proved invaluable for high reliability electronics manufacturers that need to underwrite the long-term, field reliability of their products. But the move to lead-free solders has led to a review of the technique. Graham Naisbitt explains

With the emphasis on multilayer, fine-pitch PCBs, "exotic" component packages and expensive capital equipment it's not widely appreciated that electronic circuit production is actually dominated by chemistry - and pretty aggressive chemicals at that.

Ionic residues can arise from process contaminants left over from chemicals used at all stages of fabrication. These include "unreacted" plating residues, improperly cured solder resists, soldering fluxes and inadequately cleaned (or no-clean) assemblies. Then there are also other contaminants that may be non-ionic in nature and left behind, for example, by surfactants increasingly used to aid no-clean flux to do its job.

On their own, these contaminants are relatively harmless. But when combined with moisture (for example, from a humid atmosphere) and an electrical potential these contaminants are a recipe for dendritic growth (see figure 1) that can cause shorts and corrosion and ultimately electro-chemically induced disaster.

Many engineers are familiar with the effects, and will have heard of Surface Insulation Resistance (SIR) testing - a method pioneered by the world-renowned UK National Physical Laboratory (NPL) in conjunction with Concoat Systems, the forerunner of my present company, Gen3 Systems. Following exhaustive research, NPL determined that measurements of changes to SIR would be a valuable metric in measuring the susceptibility of circuits to electro-chemical failure.

To date, the standard SIR tests published as a result of the NPL's work - defined by organisations such as International Electrotechnical Commission (IEC) and the US-based Association Connecting Electronics Industries (IPC) - have only characterised individual process chemistries such as flux or solder. However, more recent research by NPL has shown the test parameters used for these tests can yield grossly misleading data.

Worse, the introduction of lead-free solders dictated by RoHS legislation has completely changed the chemistry of electronics assembly and consequently the nature of the ionic contamination and how it may affect electronic circuits.

Lead-free challenges for SIR
While SIR testing represented a considerable leap forward in establishing what level of contamination could compromise reliability compared with to Ionic Extract Cleanliness (IEC) testing (commonly referred to as Solvent Extract Conductivity (SEC) and Resistivity (or Resistance) of Solvent Extracted (ROSE) testing (see sidebar "What is SIR?")), it has not been without its detractors. And the experts continue to argue about such things as voltage gradients, coupon design, how long the test should be conducted and at what humidity and temperature.

The "standard" test (there are several derivatives) is performed on a laminate and bare copper coupon featuring an interdigitated comb pattern (the exact design varies according to which standard is adopted, see figure 2). The coupon is subject to a tiny controlled amount of flux and the measurements are be taken over a period of seven days with the sample subject to 85% humidity at 85§C and a bias voltage of typically 100 V is applied.

Unfortunately, research by NPL has revealed this methodology yields dubious results - sometimes described as "grossly misleading" by some experts. Moreover, materials used in actual production - for example, solder resists and unreacted plating residues, not to mention uncontrolled flux volumes - have a significant impact on SIR, yet aren't even tested by the standard methodology.

Consider an example: no-clean fluxes contain less than 2% solids (compared with the 40% solids of traditional fluxes) to ensure that they can be "safely" left on the board. Unfortunately, these low solids versions don't "stick" to or wet the board without the aid of surfactants (materials than modify surface tension). These surfactants are a form of contamination that may well influence electro-chemical behaviour.

Further, to remove oxides with a no-clean flux it is sometimes necessary to increase the volume of flux or the pre-heat temperature (in order to boost the material's "activity"). When the pre-heat is turned up PCB expansion increases. This causes voids in the substrate to open up - encouraging the PCB to act like a sponge, sucking up the flux. All this increases the propensity for dendritic growth below the PCB surface.

Worse still, the traditional SIR test methods make no allowance for the new materials and processing techniques introduced by lead-free soldering .

For example, high-tin alloys such SAC305 (Sn96.5% Ag3.0% Cu0.5%) -recommended as tin/lead solder replacements by the IPC and IEC - melt at 219§C, which is much higher than eutectic solder's (60% tin(Sn) and 40% lead(Pb)) 183§C. This changes the process environment significantly. For example, all fluxes leave residues, but at the higher processing temperatures typical of lead-free assemblies, these residues are likely to be absorbed into the substrate increasing the ionic contamination and are more likely to vitrify. The problem is that none of these effects or contaminants are picked up by the standard test.

Time for a new standard
Fortunately, IEC released new SIR test standards in August 2006, called IEC 61189-5. And IPC will also shortly release new SIR testing standards: IPC-TM-650 2.6.3.7 and IPC 9201A SIR Test Handbook. These standards comprise new SIR tests for both solder flux characterisation and now process characterisation where you can examine the synergistic behaviour of your assembly process materials selection.

In addition, the IPC recently published a standard, employing SIR techniques, to determine the influence of sub-surface reactions known as CAF (Cathodic - or Conductive - Anodic Filamentation; that's dendrites to you and me).

The new standards adopt different test parameters for humidity, temperature, test duration, voltage bias, measurement frequency and test coupon, to take into account the effects of new production processes when using lead-free assemblies. Many of the numbers in these documents relate to an older German DIN standard and are consequently backed-up by lots of data.

Lets consider a process characterisation example. My company manufactures the Auto-SIR. This is an automated SIR test system that was originally developed in conjunction with the NPL. The Auto-SIR now tests an assembly put together according to IPC B-52/IEC TB57 and using the intended process chemistry mix and true dummy components representative of those on the production assembly (see figure 4). (Note, it's important not to use reject components for these tests.) The parameters for the new test are a voltage gradient of 25 V/mm - equating to 5 V bias - and measurement on 200 æm conductor width, a measurement frequency of 10 to 30 minutes for a period of not less than 72 hours. Whilst the NPL research showed that dendrites appeared in all cases within the first 72 hours of test, it is known that some fluxes take longer to react so the test duration might extend to more than 1000 hours according to research carried out by HP. A typical output from the Auto-SIR equipment operating under these test parameters is shown in figure 5.

One point worth a further mention is the bias voltage. Many have suggested that 5 V is far too low, but the NPL's work has actually shown that a lower bias voltage actually increases electro-chemical activity. It's counterintuitive, but true.

The new procedures describe a test that drives the assembly-under-test to failure to establish at what point reliability is compromised by the reactions of ionic (and non-ionic) residues using actual process materials and representative samples. With the relative lack of knowledge about processing with lead-free solders (compared to decades with traditional tin/lead alloys), more precise SIR testing will be welcomed by high reliability electronics manufacturers.


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