Foundry-certified SPICE-level accuracy

07 August 2014

Cadence introduced Voltus-Fi Custom Power Integrity Solution, a transistor-level electromigration and IR-drop solution.

The solution delivers foundry-certified SPICE-level accuracy in power signoff to create the fastest path to design closure.

The new solution is enabled by Cadence Spectre Accelerated Parallel Simulator signoff SPICE simulation, providing best-in-class accuracy at the transistor level to meet complex manufacturing specifications at advanced nodes. It complements Cadence Voltus IC Power Integrity Solution, a full-chip, cell-level power signoff tool, and completes the company’s power signoff technology solution.

Voltus-Fi Custom Power Integrity Solution enables designers to shrink the critical power signoff closure and analysis phase through key capabilities including:

• Cadence’s patented voltage-based iteration method, which requires a smaller memory footprint and runs faster than the industry’s traditional current-based iteration method

• Full integration with the Cadence Virtuoso platform, which provides a single design flow that improves designer productivity in analogue and custom block EMIR signoff

• Leverages transistor-level parasitic extraction with Cadence Quantus QRC Extraction Solution, transistor-level simulation with Cadence Spectre Accelerated Parallel Simulator and Cadence Spectre Extensive Partitioning Simulator and, finally, EMIR results visualisation on real physical layouts for quick analysis, debugging and optimisation

• Integration between Voltus-Fi Custom Power Integrity Solution and Voltus IC Power Integrity Solution, which provides a seamless flow for advanced analogue/ mixed-signal power signoff for designs with mixed transistor-level and cell-level blocks

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