New process paves the way for mobility beyond 10nm MOS devices
17 September 2013
Tensile-strained GeSn MOSFETs on Silicon have been developed by imec, KULeuven and AIST in a research project.
For the first time, operation of depletion-mode junctionless GeSn pMOSFET on silicon was developed using solid phase epitaxy in a step toward achieving tensile strain in MOSFET devices, and increasing their mobility.
To improve performance in next-generation scaled CMOS devices, researchers are exploring the integration of novel materials with superior electron mobility. This includes GeSn (GermaniumTin), described as a promising semiconductor candidate for use as a channel material, due to its superior physical properties. GeSn enables increased switching speed of MOSFET devices and can be used in fast optical communication. While most prototype GeSn channel MOSFETs are fabricated on Ge substrates, silicon integration is preferred for CMOS compatibility.
However, epitaxial growth of GeSn on silicon substrates poses several challenges, including limited solubility of Sn in Ge (0.5%), its compositional fluctuations, Sn segregation, and large lattice mismatch (at least four per cent).
Researchers developed a solid phase epitaxy process, achieving a minimum of 10µm single-crystalline GeSn layers on silicon substrates showing tensile strain, making it attractive for strain engineering of Ge channels. Furthermore, it reduces the difference between the direct and indirect band transition, resulting in acquisition of a direct band gap group IV material. Finally, due to its non-equilibrium deposition conditions, the method enables the development of GeSn with high Sn concentrations .
By decreasing the channel thickness with reactive ion etching (RIE) from ~30 to ~10nm, the researchers improved the on/off ratio by more than one order of magnitude.
Additionally, hole depletion in the GeSn layers on silicon resulted in good transfer characteristics with an on/off ratio of 84.
In the future, research will focus on optimising the GeSn MOSFET on silicon devices to further increase the channel mobility.
More details will be presented at the Solid State Devices and Materials (SSDM) conference in Fukuoka, Japan on September 25.
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