Mentor and ST join for SoC project
30 April 2010
Mentor Graphics and STMicroelectronics have announced a broad-scoped collaboration to
develop advanced design solutions at the 32-nm technology node and down to 20-nm node.
The three-year joint-development project, named DeCADE, aims to build on advanced design solutions for SoC (System On Chip) development for digital and analogue design, including system-level approaches, design methodologies, place and route strategies, optical correction for advanced manufacturing, modeling, electrical characterisation and parasitic extraction. ST will significantly contribute to the development of these new SoC design tools, which will give ST a head start in its ability to deliver customer-focused semiconductor chips and platforms.
DeCADE will provide design solutions for core CMOS technologies as well as for value-added and application-specific derivative technologies that are developed from the core CMOS process. These projects can make a fundamental difference in chip capability and, performance, as well as in system-solution cost.
Among the value-added derivative technologies being considered by the DeCADE projects include RF (Radio Frequency) and wireless technologies, as well as 3D Packaging and chip stacking technologies.
"This joint development effort will provide ST with tools to develop state-of-the-art Systems on-Chips (SoCs) at 32-nm and below for ST's customers, taking full advantage of the strong Silicon Process, Device Modeling and Design know-how present on the Crolles Site," said Philippe Magarshack, STMicroelectronics General Manager of Central CAD & Design Solutions. "This ST-Mentor Graphics joint effort further reinforces the Crolles cooperative R&D cluster, which already gathers partners that develop and enable low-power SoCs and value added application-specific technologies and is a great example of a project developed within the framework of the Nano2012 programme."
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