RRH for wireless infrastructures

27 July 2010

Lattice has partnered with Affarii to produce a low power RRH solution at 1300mW per antenna
Lattice has partnered with Affarii to produce a low power RRH solution at 1300mW per antenna

Lattice has partnered with Affarii to produce a low power RRH solution at 1300mW per antenna.

The integration of all RRH (Remote Radio Head) processing has been achieved on a single LatticeECP3-150 device, part of the LatticeECP3 FPGA family.

The single chip solution supports 2x2 MIMO configurations for WCDMA, LTE and WiMAX applications and is part of an overall RRH hardware evaluation platform jointly developed by Lattice Semiconductor and Affarii Technologies. The platform comprises of the RF front-end, high-speed data conversion devices and the digital signal processing portion. The functionality of the full signal path package includes DDC/DUC, DPD, CFR and CPRI IP cores, supports multi-carrier waveforms up to 20MHz bandwidth and is compatible with Class AB and Doherty amplifiers using LDMOS and GaN transistors.

All features of this RRH solution, both hardware and soft IP, are fully integrated and supported by Lattice’s latest generation of design tools.

The RRH solution is built using Affarii’s digitalTRX technology that includes Digital Up/Down Converter (DUC/DDC), Crest Factor Reduction (CFR) and Digital Pre-Distortion (DPD) functionality. When used with industry standard Doherty amplifiers the Digital Pre-distortion solution provides up to 30dB of ACLR correction with PA output efficiencies exceeding 40%, allowing flexible and efficient RRH designs. The solution is fully customisable, with end applications including WCDMA, LTE, WiMAX, and DVB-T/S/H.

The RRH solution is supported by a development and test environment that includes GUI-based design simulation, performance analysis and a production test API with design examples.

The LatticeECP3 family provides five logic density points between 17K and 150K LUTs. Embedded memory capacity ranges from 0.7 to 6.8 Megabits of dual-port block RAM with general-purpose I/O ranging from 133 to 586 I/O. Each device features both analog PLLs and digital DLLs for optimum clock flexibility.

“We are pleased to partner with Lattice Semiconductor to offer a low cost, low power integrated RRH platform,” said Shane Flint, Founder and CEO of Affarii. “Lattice has responded to the needs of our mutual wireless infrastructure customers who are interested in using industry leading FPGA/DSP processing solutions.”

Ron Warner, Lattice’s Marketing Manager for Wireless Infrastructure, added: “Our partnership with Affarii has yielded an RRH solution that will dramatically reduce cost and power for wireless infrastructure manufacturers. By working with Affarii, Lattice continues to deliver on our commitment to provide our customers with innovative, proven solutions that meet the industry’s demands for low cost and low power.”

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