Ethernet clock IC

06 January 2009

The Si5315 from Silicon Laboratories is a jitter-attenuating clock multiplier IC.

According to the manufacturer, the latest addition to its Any-Rate Precision Clock family meets or exceeds the performance, integration, frequency and jitter requirements for the 1G and 10G Synchronous Ethernet (SyncE) market. Indeed, it supports 10G line-encoding rates (161.13MHz) in addition to SONET/SDH and Ethernet frequencies.

The device requires no external phase-locked loop (PLL) components, simplifying line card design and frequency translation in carrier Ethernet switch routers (CESR), wireless backhaul, 3G/4G base stations, multi-service access platforms, passive optical networking, IP DSLAM and T1/E1 infrastructure.

As service providers upgrade legacy circuit switched networks to more cost-effective carrier Ethernet/IP networks, communications equipment suppliers face challenges when translating between legacy SONET/SDH and Ethernet clock frequencies. Existing SyncE clock ICs and voltage-controlled crystal oscillator-based module level solutions are limited by a combination of poor jitter performance, limited frequency flexibility and lack of integration. However, the Si5315 claims to provide the lowest jitter of any SyncE clock IC in the industry at less than 0.6ps rms phase jitter, meeting the jitter requirements specified by ITU-T G.8262 and providing significant margin to Gigabit Ethernet (GbE) and 10GbE PHY jitter requirements. The Si5315 achieves this level of performance by using Silicon Labs’ patented DSPLL technology to integrate all key components of a high-performance analogue PLL on chip, providing immunity to system noise sources. For ease of use, the Si5315 generates more than 200 of the most popular frequency translations required in SyncE line card applications, simplifying design and reducing BOM cost and complexity.

The Si5315 is packaged in a 36-lead, 6mm x 6mm QFN package with samples available this month and full production commencing in Q1 2009.

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