A new era for semiconductor design & manufacturing to usher in the Internet of Everything
Author : Dr Vincent Barlier | Commercial Director | PragmatIC Semiconductor
01 June 2022
PragmatIC FlexIC Foundry
The semiconductor industry has experienced rapid change over the years. In recent decades, growing complexity of silicon integrated circuits (ICs or chips), alongside significant increases in frequency (raw performance), has powered the development of sophisticated electronic devices such as ultra-thin PCs & smartphones. But are these complex ICs suited to all applications?...
This article was originally featured in EPDT's 2022 IoT & Industry 4.0 supplement in the June 2022 issue of EPDT magazine [read the digital issue]. And sign up to receive your own copy each month.
This type of chip typically depends on software to define the tasks it performs, enabling it to handle a variety of functions, making it ideal for powerful applications like smartphones. However, as the Internet of Things (IoT) era evolves to become the Internet of Everything (IoE), it seems low price is becoming the most significant design consideration, rather than programmability, and the majority of IoE applications require a customised chip with optimised memory, connectivity and sensing configurations. So, as Dr Vincent Barlier, Commercial Director at specialist in the design & manufacture of flexible, ultra-low-cost electronics, PragmatIC Semiconductor tells us here, a different design approach is needed…
Last year marked the 50th anniversary of the Intel 4004, the first microprocessor ever made, with an impressive (at the time) 2,300 transistors. But over the last five decades, in line with Moore’s Law (the idea that the number of transistors in a silicon-based integrated circuit will double around every 18 months), semiconductor processes and design rules have evolved from 10µm to 5nm. This is the node on which Apple announced its M1 microprocessor late in 2020. The M1 has an incredible 16 billion transistors, densely packed in at 173 million transistors per mm2. There is no doubt that these advanced nodes have enabled the development of complex and high-performing chips, but the cost of design and manufacturing has also multiplied – so much so, that this is now only available to a small number of companies, with large budgets that can cover those costs.
Does one size really fit all?
On the other hand, for the Internet of Everything (IoE), if the aim is to add intelligence and interactivity to high volumes of everyday items, then this has to be done at the lowest price point possible, since FMCG (fast-moving consumer goods) markets have always been cost-sensitive. As the price of the chips is a combination of design and production costs, it is important that both are well-controlled. In addition, IoE devices are usually mixed signal; for example, they contain sensing elements that require analogue circuits that translate real world information to actionable data, which are not suited for smaller technology nodes.
Why is a new approach needed?
To design in the latest technology nodes can cost hundreds of millions of dollars, and take years. With such huge costs involved, it’s crucial to avoid errors or design delays. Plus, there is the time to manufacture, which can be up to 6 months, once you manage to secure a production slot, which is not an easy feat in the current climate. What’s needed is a new approach that reduces both the barrier to entry and the time to market. Fortunately, there have been advances in this area and there is now an option that offers a tape-out to chip cycle time of a week or less, and with an accessible up-front cost. Therefore, it becomes possible to design, make, test and try again, without all the usual challenges associated with traditional silicon.
Now the per unit price needs to be addressed. In the conventional silicon world, the price per area has been rising as technology nodes have become increasingly complex. With silicon, it’s possible to pack large amounts of processing power into small spaces, which pays off as the relative cost per function continues to decrease. However, when the task is not so complex, the constraints of advanced silicon become expensive. Chips become I/O-bound, which means that the space needed for the I/O, power pads and so on end up defining the size, so the interior of the chip is less dense than optimum, pushing up the price. In addition, as chip size decreases, the cost of integrating the chip into a package, or whatever its application is, also increases. So, in this case, small is not necessarily best.
A new era for the semiconductor industry
There is a new approach to semiconductor design and manufacture that is completely different from traditional silicon. The underlying material is much lower cost; the integration cost is lower; and the packaging costs are lower too. The ability to manufacture on a silicon-free process drastically reduces the wafer cost, making it the most cost-efficient platform for simple circuitry.
Innovators such as nanoelectronics R&D and innovation hub, imec have been using this new approach. For example, during the recent imec, KU Leuven (a research university) and PragmatIC project to develop the fastest 8-bit flexible microprocessor for low-power applications, they used it to enable the rapid prototyping and turnaround of new designs.
These novel ICs (integrated circuits) are engineered to be ultra-low-cost, thin and flexible, enabling electronics in everyday objects and novel mass market use cases, such as sustainability and digital healthcare solutions. Innovators can now design the simplest circuitry to deliver the required functionality for applications where form factor and cost make silicon ICs economically non-viable. Pioneering organisations can now undertake pilots in decent volumes at a very early stage. This ushers in a new era for semiconductor design and manufacture, with a new approach that is paving the way for innovators who are striving to deliver the Internet of Everything.