ASICs meet the need for speed in ADAS & IVI systems

Author : Markus Moosmüller & Stephan Ahles | Senior Marketing Engineers | Socionext

01 October 2020

Socionext_ASICs meet the need for speed in ADAS & IVI systems_580x280
Socionext_ASICs meet the need for speed in ADAS & IVI systems_580x280

Changes to vehicle interiors are continuing apace, as the industry moves inexorably towards autonomous driving. This process involves merging IVI (in-vehicle infotainment) & ADAS (advanced driver assistance systems) with the aim of improving the driving experience, while ensuring increased safety.

This article was originally featured in the October 2020 issue of EPDT magazine [read the digital issue]. Sign up to receive your own copy each month.

In order to implement these new features, complex and integrated hardware and software solutions are required. As Markus Moosmüller & Stephan Ahles, Senior Marketing Engineers at system-on-chip company, Socionext tell us, ASICs (or custom SoCs) offer the ideal solution for a customer- and application-optimised platform.

When people buy cars these days, they consider more factors than simply the look and driving characteristics of the vehicle in making their purchasing decision. For instance, connectivity, including seamless integration of mobile devices, now plays an important role. Furthermore, simple and convenient operation through touch interfaces, plus voice and gesture control, together with a variety of customisation options, such as light, audio and seat settings, are mandatory. Using artificial intelligence and biometric recognition, these settings can also be automated and transferred from vehicle to vehicle.

This makes people, with their individual demands and requirements, the increasing focus when specifing new IVI systems. This trend is only set to intensify when the introduction of level 3 and 4 autonomous vehicles evolve the actual process of driving a car into a secondary task. This will open up a whole new range of possibilities for in-vehicle passenger entertainment, in conjunction with in-car payment options.

Drivers of the future will see this in a purely digital cockpit, presenting all relevant information on a seamless wide-screen display consisting of multiple high-resolution screens. To further improve the driving experience and offer greater comfort and safety, modern IVI systems also integrate a large number of ADAS features.

This involves processing relevant information from a fusion of many different sensors, including radar, LiDAR, ultrasound and cameras, along with real-time decision making. Deep learning and object recognition are then used to gather additional information to help support the driver and enhance comfort levels. Typical applications include 360° surround view, parking assist and driver monitoring.

To implement these features, complex hardware and software is required. In terms of hardware, both IVI and ADAS require complex multi-processor systems with high computing power, which can only be implemented in the form of highly integrated circuits.

ADAS video data processing is a good example. CNNs (convolutional neural networks) are often used to detect the vehicle’s surroundings, together with other road users, in video data. These systems are capable of learning, replicating biological brain cells in electronic form. They have been proven to work well in fields such as image detection. In vehicles, ‘CNN inference systems’ are used to replicate CNNs that have already ‘learned’ to detect certain structures.

CNNs are replicated in hardware with a mix of DSPs (digital signal processors), GPUs (graphical processing units) and NNPs (neural network processors). One major challenge in this type of system is the enormous amount of data transferred between the memory and processing units. Modern, high-speed memory interfaces like LP-DDR5 or HBM, as well as good system design to prevent bottlenecks, are therefore important for ADAS.

In 2019, American electric vehicle pioneer Tesla developed its own ADAS chip called FSD (Full Self-Driving), and disclosed its architecture. Besides an LP-DDR4 memory interface, Tesla installed a 1 Gpixel/s ISP (image signal processor), two NNPs clocked at 2 GHz, a GPU cycled at 1 GHz and a 12-core ARM CortexA72 CPU (2.2 GHz). The 260mm 2  chip supplies a total of 50 TOPS (trillion operations per second) – in other words, 50 x 1012 processing operations per second at a power consumption of 100W. As 100 TOPS is considered to be a requirement for fully autonomous vehicles, Tesla plans to use two FSD chips in its FSD computer.

There are similar requirements in the field of IVI, as this also demands intensive processing power to stitch together image data from multiple sources (for instance, to deliver full surround view), for example, and/or to ‘understand’ it (for instance, driver monitoring). In contrast to ADAS, an IVI chip may be less CNN-heavy, but CPUs, GPUs and, in all likelihood, NNP blocks will still be required.

Possible semiconductor technologies for integrated circuits in the field of ADAS and IVI are currently 7nm or 5nm CMOS (complementary metal-oxide-semiconductor) technologies. They enable clock rates of 2 GHz and above, as well as high integration densities, while reducing power consumption to the minimum levels currently possible.

The integration of high-performance computers on an IC (integrated circuit) still represents a major challenge. It is not simply a matter of taking the blocks (CPUs, GPUs, NNAs, and so on) required for the potential processing power and integrating them on a chip. You must also ensure the bus architecture offers the flexibility and bandwidth needed to permit the required data flow. This means keeping a close eye on chip size, which then has a direct impact on unit cost, as well as the power consumption of the overall circuit.

Application-specific implementation via ASIC (application-specific integrated circuit) is an optimal method for reconciling these somewhat conflicting requirements and optimising them to the relevant application. ASICs also allow proprietary algorithms and methods to be implemented directly within hardware. This can help differentiate a product from the competition and achieve a clear competitive advantage.

It might therefore be worthwhile for automotive manufacturers and suppliers to build up and expand their expertise in the area of ASIC design and development. Socionext has many years of experience in automotive ASICs (or custom SoCs: system-on-chips) and – as the world’s second largest fabless ASIC provider – is a reliable partner in this field. Besides ASIC (or custom SoC) design and layout services, Socionext offers a complete range of solutions for automotive customers, including specification design, ISO 26262 support, and IP procurement and logistics.

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