FPGA primer: Programmable hardware offers scalable performance

Author : Cliff Ortmeyer | Global Head of Technical Marketing | Farnell

03 January 2020

Farnell_FPGA primer_Programmable hardware offers scalable performance
Farnell_FPGA primer_Programmable hardware offers scalable performance

Programmability underpins the electronics industry, and it’s widely accepted that embedded software development now accounts for the majority of development budgets. However, programmability isn’t limited to microprocessors & microcontrollers.

This article was originally featured in the January 2020 issue of EPDT magazine [read the digital issue]. Sign up to receive your own copy each month.

Devices that are configurable at the hardware level are also used extensively, and in some cases, can reduce or remove the need for microprocessors. And as Cliff Ortmeyer, Global Head of Technical Marketing at electronics distributor, Farnell tells us, the latest FPGAs offer unprecedented levels of flexibility and efficiency, providing a system-level solution to rising design complexity.

Field programmable gate arrays, or FPGAs, are the industry’s answer to custom ICs – without the engineering costs of developing an ASIC. Their architecture supports the implementation of application-specific digital logic that can deliver much higher performance than a microprocessor performing the same function at a software level.

Performance is one of the many reasons why FPGAs are used today but their benefits are much more far-reaching, making them viable in almost any application.

What is an FPGA?

Unlike a conventional integrated circuit, in which the vast majority of the functionality is fixed, an FPGA is a comparative blank canvas. The term ‘gate array’ refers to the logic gates that can be configured to create digital circuits such as shifters, adders or multipliers, which can be combined to create even more complex digital functions. It’s also possible to implement a complete microcontroller in an FPGA fabric, which can lower the overall Bill of Materials (BoM) and cost of the product.

Farnell_FPGA primer_Programmable hardware offers scalable performance
Farnell_FPGA primer_Programmable hardware offers scalable performance

While the array of gates is representative of what is going on inside an FPGA, in many cases they use look-up tables to mimic the output of a Karnaugh map, used to simplify logic expressions defined using Boolean algebra. The number of elements in a look-up table (often abbreviated by manufacturers to LUT) effectively determines how complex the equivalent Boolean expression can be.

Modern devices can feature hundreds of thousands of LUTs, but thankfully the engineer using the FPGA doesn’t need to do the translation from logic expression to look-up table – the manufacturer’s development environment handles that for them.  It also manages the most important part of configuring an FPGA (from a performance point of view), that of deciding which function will be placed where in the device. This ‘floor planning’, as it is known, is crucial to not  only getting the best performance but also maximising the level of utilisation of a device. As such, the technology is a closely guarded by FPGA manufacturers, but the front-end design can often be handled by a range of development environments from other vendors, allowing engineers to use the environment they are most comfortable with.

This extends to the way the design is actually entered. The industry supports two languages designed specifically for developing hardware: VHDL and Verilog. These are termed hardware description languages (HDLs) because they literally describe the logic functions and their connections in much the same way as other high-level languages are used in software development. One of the most popular languages used in software development, C++, has also been adapted and extended to be used as an HDL, known as SystemC. Unlike software languages, HDLs operate concurrently; that is, all of the hardware described is running at the same time, irrespective of where it appears in the listing. This concurrent operation is one of the key concepts developers need to understand when designing FPGAs (or ASICs, for that matter).

As well as HDLs, FPGAs can also be designed using traditional schematic capture. However, due to their constantly increasing complexity and capacity it is now often more feasible to design complex FPGAs at a macro level using blocks of pre-designed (and pre-verified) functions that are ‘plugged’ together in the design environment. Leading FPGA vendors, such as Xilinx, offer libraries of logic blocks — or IP (intellectual property), as it’s known — for this purpose. Independent companies also develop IP, and in many cases it is the same IP an ASIC designer would use in a full-custom chip design.

Increasing flexibility, reducing design complexity

PSoC 6 Dual-Core MCU Architecture
PSoC 6 Dual-Core MCU Architecture

Programmable logic devices have been around for several decades and have evolved from being relatively simple to highly complex. Their regular pattern has even helped the semiconductor industry to innovate, too, as they are often used to help optimise new geometries. As a result, FPGAs are normally the first commercially available ICs manufactured on leading-edge processes, which has helped them stay relevant and competitive. Their inherently high performance and quick design cycles (compared to a full-custom ASIC) means they are popular choices in applications where performance is key and competition is high, such as the telecommunications industry. However, more recently, FPGA manufacturers have been integrating more and more fixed-functions alongside the configurable fabric. This provides engineers with the flexibility of an FPGA alongside the convenience of pre-configured functionality, making them more suitable in a wider range of applications.

As FPGAs are manufactured using the latest fabrication processes, they are also able to deliver the benefits of those processes. This means higher transistor density, of course, but it also means lower power. One criticism levelled at early FPGAs was their relatively high power consumption, when compared to a fixed-function device; this was unavoidable, given that they would typically use many more transistors to implement the same function. However, the semiconductor industry has focused on bringing down power density in fabrication processes, in order to integrate more transistors. As a result, modern FPGAs can boast truly low power operation, making them viable in almost any application, even battery-powered devices. As an example, the Spartan-7 FPGA family from Xilinx provides 30% more performance than previous generations, but consumes just half the power.

The many benefits of programmable technology

Another example of a programmable solution is the PSoC family from Cypress Semiconductor. These are highly integrated devices that offer a level of configurability most other programmable devices don’t, as they include both digital and analogue configurability. Rather than being just an array of logic, PSoCs are also able to emulate analogue functions through switched capacitor technology. This is integrated alongside fixed functions and, in the case of the PSoC 6 family, includes dual microcontroller cores (an ARM Cortex-M4 and ARM Cortex-M0+). The PSoC 6 is manufactured on a 40nm process, meaning it can offer high performance without sacrificing ultra-low power.

The trend towards integrating fixed functions means that, increasingly, engineers no longer need to think of programmable devices as an ocean of uncommitted gates. Instead they should be viewed as a system with fixed functions that are tightly integrated and complemented by a configurable fabric. These devices can normally be customised through a relatively simple ‘drag and drop’ approach which raises the abstraction level, effectively masking the underlying complexity.

It may appear that the benefits of using programmable devices are based primarily on their flexibility, and in many cases that would be enough reason to use an FPGA, instead of an alternative system-level solution. However, their benefits extend beyond flexibility – to include cost and performance.


Traditionally, an FPGA was most commonly chosen as an alternative to designing a full-custom solution, or ASIC (application specific integrated circuit). In this respect, the FPGA offers a much lower NRE (non-recurring engineering) cost, most notably in the verification stage of design (which, for an ASIC, can be extensive). While an ASIC offers a much lower unit cost than an FPGA, the large NRE (which includes the design time needed) would often mean an FPGA made better financial sense.

When compared against standard logic or ASSPs (application specific standard parts), as well as microcontrollers and DSPs (digital signal processors), an FPGA can often deliver greater performance. As explained earlier, hardware executes much faster than software, primarily because all of the hardware operates concurrently. This can easily be scaled up in an FPGA through parallelism; the same functional block can be repeated many times in the FPGA fabric, so that many results can be produced in very few clock cycles. This is most apparent in applications that require DSP functionality. Many FPGAs now integrate dedicated DSP blocks which can be augmented in the fabric through parallelism. This may include building many hundreds of multiply-accumulate blocks, for example.

Many (but not all) FPGAs are configured at power-up through a (normally external) non-volatile memory device, which contains the bit stream used to configure the device. This highlights another advantage of FPGAs; they can be reprogrammed after they have left the manufacturer. It is now commonplace to issue ‘over the air’ firmware updates to software running on microcontrollers or microprocessors; in the same way, it is equally feasible to reconfigure the hardware functions of an FPGA, in the field.

Design security is becoming more important to manufacturers. By putting more of the system in a single device like an FPGA, design security can be increased, while reducing the overall BoM and cost. Advanced security features are now integrated into FPGAs to further protect the customer’s IP, as well as the data being processed by the system.


Electronic product design is challenging, and the trend for connectivity in all things is just one reason why complexity is going up. System level solutions like FPGAs can significantly ease that complexity, as they offer a flexible approach to design through high levels of abstraction. FPGAs now offer some of the highest performance-per-Watt figures in the industry, making them ideal in a wide range of applications. Flexibility has never been so efficient.

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