Reducing EMI in high-speed power conversion

Author : Dr. Anup Bhalla | VP of Engineering | UnitedSiC

01 August 2019

UnitedSIC SiC FETs

Wide band-gap devices in power conversion can switch within nanoseconds, promising low losses. However, such edge rates can cause EMI problems, so special precautions must be taken to ensure trouble-free operation & compliance with international emissions standards.

This article was originally featured in the August 2019 issue of EPDT magazine [read the digital issue]. Sign up to receive your own copy each month.

Here, Dr. Anup Bhalla, VP of Engineering at manufacturer of silicon carbide (SiC) power semiconductors, UnitedSiC explains how EMI gets generated in power conversion circuitry and explores design strategies for reducing and controlling it.

Power converters spend most of their time doing nothing. Current gently flows through magnetics and in and out of capacitors. Control loops settle quietly and controllers idle, waiting for an RC circuit to charge to a critical point. Dissipation is close to zero. Then a comparator flips, a driver outputs a step voltage to a switch gate, and suddenly many amps of current are flowing into a capacitance. The switch’s drain voltage drops to

ground, at rates of hundreds of volts and several amps per nanosecond. All goes quiet again while energy is stored or transferred, then, with another jolt, everything reverses.

The jolt of a switching transition may last less than 0.5% of a switching cycle, but will present such high currents and voltages to the switch that it has to manage kilowatts of instantaneous power, as shown in Figure 1.

These waveforms are typical of a silicon carbide (SiC) JFET, which achieves fast transitions with very low device capacitances. Capacitances are low because SiC allows a smaller die size for the same performance, compared with Si-MOSFETs, due to having lower on-resistance, three times greater thermal conductivity, and the ability to withstand voltages that are ten times as high. When SiC JFETs are paired with a low-voltage Si-MOSFET as a co-packaged cascode, the resultant device’s speed is even greater.

UnitedSIC SiC FETs Figure 1 & Figure 3

But there are drawbacks. Fast switching waveforms have edges that generate electromagnetic interference (EMI), either as conducted and radiated transients that couple into nearby circuits, or by leaking out to affect other equipment. International standards limit external EMI, commonly FCC part 15 rules in the US and CISPR22 in Europe (now CISPR32/EN55032). Equipment for use in industrial/commercial environments must meet the profile shown as A in Figure 2, while equipment for use in residential environments must meet the more stringent B profile.

How EMI gets generated

The extremely rapid changes in voltage and current (dv/dt and di/dt) involved in power conversion circuitry are supposed to be confined within the switching device and its immediate load, by adding local decoupling capacitors to sink and source current transients and clamp voltages to safe levels. RC snubbers are also often used.

In the real world, though, capacitors are imperfect, and the finite connection distance to them across a circuit board has an inductance of about 1nH/mm. A transformer load could also present a 1µH leakage inductance in series with the switch’s drain.

Changing the current (di/dt) flowing through an inductance produces a voltage (according to the formula E = -L.di/dt), so the waveform in Figure 1, which switches 20A in about 10ns, would produce a 2kV transient across 1µH. In a typical circuit, this adds to the drain voltage, risking break-down, requiring users to slow transistions substantially.

Inductances in the source connection of a switch can present a particular problem, because if the current through them decreases rapidly, this produces a negative source voltage transient. This, in turn, can oppose the Off gate-drive voltage, which can then cause the device to turn On spuriously, risking a short circuit (Figure 3). It’s also the case that high-frequency currents through an inductance will generate an EM field that can couple into the rest of the circuit or interfere with external equipment.

UnitedSIC SiC FETs Figure 2

Rapid changes in voltage (dv/dt) cause current transients in capacitances, according to the formula I = C.dv/dt. Looking again at the waveform in Figure 1, a signal changing by 100V/ns would induce 1A into just 10pF. As this current finds a return path, transient voltages are generated across connection inductances and resistances, risking damage, as well as conducted and radiated emissions.

Switches are also often presented with the capacitances that are formed across insulation layers to ground. Current circulating to ground creates common-mode noise that can circulate externally and is specifically limited by international EMI standards. The limits in Figure 2 relate to a combination of common-mode (line and neutral to ground) and differential-mode noise (between line and neutral).

Slowing edges helps

EMI can be reduced by slowing switching edges, which can be achieved with SiC FETs by adding series gate resistances. The turn On and Off edges can be separately controlled by two resistors, with an isolation diode, as shown in Figure 4 for a SiC cascode.

This works well, but can defeat the purpose of using SiC for its speed. Slowing the edges of gate-drive signals also restricts the adjustment range of pulse-width modulated control strategies by limiting the minimum width of a pulse.

Snubbers can work well

It’s possible to slow drain dv/dt, and the consequent di/dt, using snubbers, typically an RCD network that diverts current into a capacitance as a FET turns off (see Figure 5). Simple snubbers include a resistor, which dissipates power and so reduces efficiency. Complex snubber circuits don’t dissipate energy, instead returning it to the supply. However, UnitedSiC has recently shown that designers only need a small snubber to keep voltage overshoots within bounds when using its fastest SiC devices. This small snubber also dissipates less energy than slowing the device by using gate resistors.

UnitedSIC SiC FETs Figure 4

EMI control is not just about circuit design and device characteristics. Good board layouts can reduce EMI by keeping decoupling capacitors close to the source of noise and making all high-current, high-frequency paths as short as possible. Thicker board traces reduce inductance and resistance, and high-frequency ‘go’ and ‘return’ paths should be routed together so that their radiative emissions cancel each other out (Figure 6).

EM fields

One common source of EM radiation is the high-current secondaries from transformers, which may have flying-lead connections for convenience. These should be twisted together to reduce radiative EMI. Magnetic components are also be a source of EMI, so transformers often have a ‘belly band’ that acts as a shorted turn for leakage fields. The choice of magnetic component also matters: a gapped ferrite E-core will have lower losses than powdered-iron toroids, but more field leakage.

Displacement currents

It’s hard to minimise stray capacitances in layouts, especially at high power with large heatsinks. One advantage of the latest wide-bandgap SiC devices is that they have such high efficiency that heatsinks can be smaller, and possibly board-mounted. They also may not be grounded, but instead connected to the primary DC bus, so that any induced currents only circulate locally.

If the heatsink must be grounded, current induced through dv/dt can be reduced by using a thicker insulator, such as a beryllium oxide pad, to reduce the capacitance it presents, or an insulator pad that includes a grounded electrostatic screen.

UnitedSIC SiC FETs Figure 5 & Figure 6

Switching devices should also be physically isolated to avoid capacitances forming between them and other components, or the enclosure. This limits the flow of ground displacement currents. Circuit topology can also help: the switching nodes of full bridges are out of phase and so the ground currents each induces in any parasitic capacitances can, with careful board layout, be made to cancel each other out.

The transformers used in isolated converters also have a capacitance, which causes a displacement current from the primary to ground through outputs. This can be blocked with an electrostatic screen between the primary and secondary of the transformer, connected to the primary DC bus.

The main switching transistors in a converter are not the only source of EMI. Rectifier diodes in power-factor correction circuits and on DC outputs can also create EMI at high frequencies, due to reverse-bias charge recovery. This source of noise can be reduced by using Schottky or SiC diodes.

The least sophisticated way to control EMI is to fit common-mode and differential-mode filters, but even these have design tradeoffs. It is always better to minimise the effects at source rather than filter later.


EMI is a fact of life for power designers but it can be controlled. The latest resonant converter topologies, and techniques such as frequency dithering to spread emissions across a wider bandwidth, can help. In more traditional designs, SiC devices can be tuned for acceptable EMI levels using a combination of gate control, snubbers, good board layout practices, and an appreciation of the routes that EMI can take.

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