Consumer silicon is software-defined

01 September 2007

Software Defined Silicon (SDS) device architecture
Software Defined Silicon (SDS) device architecture

In the face of rapidly evolving technologies and unpredictable trends in consumer fashion, flexibility has become a vital necessity alongside cost and time-to-market targets

Consider the cost and competitive pressures faced by consumer electronics designers today and it is clear that traditional programmable silicon platforms are no longer up to the challenge. Unit cost is a key concern, as is time-to-market, but flexibility is now a vital necessity too.

Put simply, increased design flexibility impacts in two ways. A designer is able to innovate more easily and quickly, and is, as a result, able to more readily differentiate. Differentiation is paramount. When done well the product has a distinct competitive advantage and has mass market appeal.

In terms of differentiation, ASICs provide a designer with what is specified and, certainly in very high volumes, the unit cost can be attractive. The disadvantage of ASICs though lies in the length of time it takes to respin and the high total NRE (non-recurring engineering) cost. The risk is massive. ASSPs on the other hand, while not subject to the same NRE costs, offer limited scope for differentiation.

ASSP appeal
The ASSP vendor often provides a complete reference design, which delivers low unit cost. This is shared by many OEMs, so the prospect of differentiation is restricted to minor software additions for which the development process can be arduous. If an OEM successfully lobbies a vendor to include a new feature, the time it takes to implement merely takes away the likelihood of competitive advantage. Additionally, it is then shared with rival OEMs.

FPGAs certainly offer great flexibility and have proved their worth in high complexity applications in the telecoms and military sectors, for example. For the consumer electronics sector however they simply cannot offer a low enough unit cost, and there is a high programming cost.

XMOS Semiconductor, a VC-backed start-up based in Bristol, contends that it is time for real change. The company believes that for consumer electronics designers to have the right combination of flexibility and cost a completely new category of programmable silicon device is needed: Software Defined Silicon or SDS.

XMOS and its SDS approach uses arrays of multi-threaded processors to implement all the functions within a system. What makes the processor architecture unique is that it will allow functions traditionally implemented in hardware to be done in software, not normally achievable using traditional processor architectures. By moving the entire system into software, the whole software and hardware design flows can be unified. SDS devices are made up of processors and memory, both silicon area efficient structures, which allow XMOS to offer cost-effective user configurable and programmable silicon devices. Devices will be offered in the $1 to $10 range.

At the heart of an SDS device is a fast, event-driven RISC processor engine. Named XCore, it will support up to eight threads (tasks) and is supported by 64kbit of on-chip RAM per core. Core-to-core communication is achieved via a 1Gbit/sec crossbar switch called XLink. By integrating tight I/O pin control within XCore, functions such as communications interfaces can be transferred into software. In terms of its capability, a 100Mbit/sec Ethernet MAC and MII interface have been achieved. The SDS approach uses a standard embedded software flow for programming the devices. Programming is in C, C++ or XC, XMOS’s own version of C that adds support for multithreading and I/O port control.

NOEL HURLEY is vice president, marketing, XMOS Semiconductor


Contact Details and Archive...

Print this page | E-mail this page