Seeing is believing

19 August 2008

SoC provides image recognition for safer driving.

An SoC that offers image recognition processing functions for vehicle information terminals such as car navigation systems is now available in Europe.

The SH77650 from Renesas was developed as a dedicated image recognition processing LSI device, and features image recognition processing intellectual property from Hitachi.

According to the manufacturer, this IP covers specialised hardware that performs the processing necessary to recognise road conditions based on image data captured by a camera. Multiple external environment recognition programs can run simultaneously in real time and perform tasks such as roadway lane recognition, or detection and tracking of leading vehicles.

In addition, an image recognition library with approximately 200 functions is provided to facilitate the development of image recognition applications. It is also possible to use image recognition applications originally developed for the SH7774 with the SH77650. At its maximum operating frequency of 300MHz, the processing performance of the SH77650 is claimed to be 540 million instructions per second. The on-chip floating-point processing unit also operates at a maximum of 300MHz. This supports single and double-precision calculations, delivering a maximum operating performance of 2.1GFLOPS (giga floating-point operations per second) in single-precision mode.

As well as an image recognition processing accelerator, a variety of modules are provided, such as video input interface and display functions, a dedicated DMA controller, timers, a serial communication interface, and a CAN2 interface for in-vehicle LANs. Screens up to a maximum size of 850 x 480 pixels are supported. There is an on-chip bus arbitrator circuit that sets the priority of attempts by the modules to access the bus. This circuit supports three access priority levels and makes it possible for multiple internal modules to efficiently access external memory. The user can change the priority levels in order to meet the requirements of the CPU or image processing performance.

Furthermore, a 32bit dedicated bus is provided as an external bus allowing connection to high-speed DDR1-SDRAM, and a 32bit expansion bus enables connection to flash memory or SRAM. The package used is a 376pin 19mm x 19mm BGA. Development tools include the E10A-USB emulator, which connects to a host PC via a USB bus. It also provides on-chip debugging functionality, allowing real-time debugging at the SH77650’s maximum operating frequency.


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